Invention Grant
- Patent Title: Detection method for semiconductor integrated circuit device, and semiconductor integrated circuit device
- Patent Title (中): 半导体集成电路器件的检测方法以及半导体集成电路器件
-
Application No.: US13703945Application Date: 2011-06-13
-
Publication No.: US08937310B2Publication Date: 2015-01-20
- Inventor: Tomonori Nakamura
- Applicant: Tomonori Nakamura
- Applicant Address: JP Hamamatsu-shi, Shizuoka
- Assignee: Hamamatsu Photonics K.K.
- Current Assignee: Hamamatsu Photonics K.K.
- Current Assignee Address: JP Hamamatsu-shi, Shizuoka
- Agency: Drinker Reath & Reath LLP
- Priority: JP2010-138618 20100617
- International Application: PCT/JP2011/063520 WO 20110613
- International Announcement: WO2011/158797 WO 20111222
- Main IPC: H01L23/58
- IPC: H01L23/58 ; H01L21/66 ; H01L23/48 ; H01L25/065 ; H01L25/00 ; H01L27/08

Abstract:
Integrated circuit layers to be stacked on top of each other are formed with a plurality of inspection rectifier device units, respectively. The inspection rectifier device units including rectifier devices are connected between a plurality of connection terminals and a positive power supply lead and a grounding lead and emit light in response to a current. After electrically connecting the plurality of connection terminals to each other, a bias voltage is applied between the positive power supply lead and the grounding lead, and the connection state between the connection terminals is inspected according to a light emission of the inspection rectifier device unit. This makes it possible to inspect, in a short time every time a layer is stacked, whether or not an interlayer connection failure exists in a semiconductor integrated circuit device constructed by stacking a plurality of integrated circuit layers in their thickness direction.
Public/Granted literature
Information query
IPC分类: