Invention Grant
US08938701B2 Method of managing electro migration in logic designs and design structure thereof
有权
在逻辑设计及其设计结构中管理电迁移的方法
- Patent Title: Method of managing electro migration in logic designs and design structure thereof
- Patent Title (中): 在逻辑设计及其设计结构中管理电迁移的方法
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Application No.: US13967030Application Date: 2013-08-14
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Publication No.: US08938701B2Publication Date: 2015-01-20
- Inventor: John E. Barwin , Jeanne P. S. Bickford
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Roberts Mlotkowski Safran & Cole, P.C.
- Agent David Cain
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
A method of designing an integrated circuit includes modifying a design attribute-variable electromigration (EM) limit for each pre-defined circuit based on at least one reliability constraint in order to avoid EM violations of an integrated circuit. The method further includes synthesizing the integrated circuit from a high level description to at least a subset of the pre-defined circuit devices using the modified design—variable EM limit of each pre-defined circuit.
Public/Granted literature
- US20130332895A1 METHOD OF MANAGING ELECTRO MIGRATION IN LOGIC DESIGNS AND DESIGN STRUCTURE THEREOF Public/Granted day:2013-12-12
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