Invention Grant
- Patent Title: Package structure of a chip and a substrate
- Patent Title (中): 芯片和基板的封装结构
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Application No.: US13853281Application Date: 2013-03-29
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Publication No.: US08941224B2Publication Date: 2015-01-27
- Inventor: Ting-Hao Lin , Yu-Te Lu , De-Hao Lu
- Applicant: Kinsus Interconnect Technology Corp.
- Applicant Address: TW Taoyuan
- Assignee: Kinsus Interconnect Technology Corp.
- Current Assignee: Kinsus Interconnect Technology Corp.
- Current Assignee Address: TW Taoyuan
- Agency: Lin & Associates IP, Inc.
- Main IPC: H01L23/06
- IPC: H01L23/06 ; H01L23/498

Abstract:
A package structure includes a thin chip substrate, a stabilizing material layer, a chip and a filling material. A first circuit metal layer of the substrate is inlaid into a dielectric layer and a co-plane is defined by the first circuit metal layer and the dielectric layer and is exposed from the dielectric layer. The bonding pads of the substrate are on the co-plane, have a height higher than the co-plane and connected to the first circuit metal layer. The stabilizing material layer is provided on two sides of the co-plane to define a receiving space for accommodating the chip. The filling material is injected into the receiving space to fasten the pins of the chip securely with bonding pads. Since no plastic molding is required, a total thickness of the package structure and the cost is reduced. The stabilizing material layer prevents the substrate from warping and distortion.
Public/Granted literature
- US20140291853A1 PACKAGE STRUCTURE OF A CHIP AND A SUBSTRATE Public/Granted day:2014-10-02
Information query
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