Invention Grant
US08943296B2 Virtual address mapping using rule based aliasing to achieve fine grained page translation
有权
虚拟地址映射使用基于规则的别名来实现精细的页面翻译
- Patent Title: Virtual address mapping using rule based aliasing to achieve fine grained page translation
- Patent Title (中): 虚拟地址映射使用基于规则的别名来实现精细的页面翻译
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Application No.: US13096755Application Date: 2011-04-28
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Publication No.: US08943296B2Publication Date: 2015-01-27
- Inventor: Benjamin C. Serebrin , Bhavesh Mehta
- Applicant: Benjamin C. Serebrin , Bhavesh Mehta
- Applicant Address: US CA Palo Alto
- Assignee: VMware, Inc.
- Current Assignee: VMware, Inc.
- Current Assignee Address: US CA Palo Alto
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F12/10 ; G06F9/455 ; G06F11/14
Abstract:
One or more unused bits of a virtual address range are allocated for aliasing so that multiple virtually addressed sub-pages can be mapped to a common memory page. When one bit is allocated for aliasing, dirty bit information can be provided at a granularity that is one-half of a memory page. When M bits are allocated for aliasing, dirty bit information can be provided at a granularity that is 1/(2M)-th of a memory page.
Public/Granted literature
- US20120278525A1 INCREASING GRANULARITY OF DIRTY BIT INFORMATION Public/Granted day:2012-11-01
Information query
