Invention Grant
- Patent Title: Replacement gates to enhance transistor strain
-
Application No.: US13909792Application Date: 2013-06-04
-
Publication No.: US08946016B2Publication Date: 2015-02-03
- Inventor: Mark T. Bohr
- Applicant: Intel Corporation
- Applicant Address: unknown Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: unknown Santa Clara
- Agency: Forefront IP Lawgroup, PLLC
- Main IPC: H01L21/8238
- IPC: H01L21/8238 ; H01L21/28 ; H01L29/49 ; H01L29/51 ; H01L29/66 ; H01L29/78 ; H01L29/165

Abstract:
Some embodiments of the present invention include apparatuses and methods relating to NMOS and PMOS transistor strain.
Public/Granted literature
- US20130267070A1 REPLACEMENT GATES TO ENHANCE TRANSISTOR STRAIN Public/Granted day:2013-10-10
Information query
IPC分类: