A method of forming a semiconductor device that includes providing a substrate including a semiconductor layer on a germanium-containing silicon layer and forming a gate structure on a surface of a channel portion of the semiconductor layer. Well trenches are etched into the semiconductor layer on opposing sides of the gate structure. The etch process for forming the well trenches forms an undercut region extending under the gate structure and is selective to the germanium-containing silicon layer. Stress inducing semiconductor material is epitaxially grown to fill at least a portion of the well trench to provide at least one of a stress inducing source region and a stress inducing drain region having a planar base.