Invention Grant
US08946721B2 Structure and method for using high-K material as an etch stop layer in dual stress layer process
有权
在双应力层过程中使用高K材料作为蚀刻停止层的结构和方法
- Patent Title: Structure and method for using high-K material as an etch stop layer in dual stress layer process
- Patent Title (中): 在双应力层过程中使用高K材料作为蚀刻停止层的结构和方法
-
Application No.: US13779897Application Date: 2013-02-28
-
Publication No.: US08946721B2Publication Date: 2015-02-03
- Inventor: William K. Henson
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Scully, Scott, Murphy & Presser, P.C.
- Agent H. Daniel Schnurmann
- Main IPC: H01L21/48
- IPC: H01L21/48 ; H01L27/092 ; H01L21/311 ; H01L21/8238 ; H01L21/84 ; H01L27/12

Abstract:
A method is provided that includes forming a high-k dielectric etch stop layer over at least a first conductivity type semiconductor device on a first portion of a substrate and at least a second conductivity type semiconductor device on a second portion of the semiconductor device. A first stress-inducing layer is deposited over the first conductivity type semiconductor device and the second conductivity type semiconductor device. The portion of the first stress-inducing layer that is formed over the second conductivity type semiconductor device is then removed with an etch that is selective to the high-k dielectric etch stop layer to provide an exposed surface of second portion of the substrates that includes at least the second conductivity type semiconductor device. A second stress-inducing layer is then formed over the second conductivity type semiconductor device.
Public/Granted literature
- US20130175634A1 STRUCTURE AND METHOD FOR USING HIGH-K MATERIAL AS AN ETCH STOP LAYER IN DUAL STRESS LAYER PROCESS Public/Granted day:2013-07-11
Information query
IPC分类: