Invention Grant
US08946721B2 Structure and method for using high-K material as an etch stop layer in dual stress layer process 有权
在双应力层过程中使用高K材料作为蚀刻停止层的结构和方法

Structure and method for using high-K material as an etch stop layer in dual stress layer process
Abstract:
A method is provided that includes forming a high-k dielectric etch stop layer over at least a first conductivity type semiconductor device on a first portion of a substrate and at least a second conductivity type semiconductor device on a second portion of the semiconductor device. A first stress-inducing layer is deposited over the first conductivity type semiconductor device and the second conductivity type semiconductor device. The portion of the first stress-inducing layer that is formed over the second conductivity type semiconductor device is then removed with an etch that is selective to the high-k dielectric etch stop layer to provide an exposed surface of second portion of the substrates that includes at least the second conductivity type semiconductor device. A second stress-inducing layer is then formed over the second conductivity type semiconductor device.
Information query
Patent Agency Ranking
0/0