Invention Grant
- Patent Title: Monolithic semiconductor switches and method for manufacturing
- Patent Title (中): 单片半导体开关及其制造方法
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Application No.: US13487999Application Date: 2012-06-04
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Publication No.: US08946767B2Publication Date: 2015-02-03
- Inventor: Oliver Haeberlen , Walter Rieger , Martin Vielemeyer , Lutz Goergens , Martin Poelzl , Milko Paolucci , Johannes Schoiswohl , Joachim Krumrey
- Applicant: Oliver Haeberlen , Walter Rieger , Martin Vielemeyer , Lutz Goergens , Martin Poelzl , Milko Paolucci , Johannes Schoiswohl , Sonja Krumrey
- Applicant Address: AT Villach
- Assignee: Infineon Technologies Austria AG
- Current Assignee: Infineon Technologies Austria AG
- Current Assignee Address: AT Villach
- Agency: Dicke, Billig & Czaja, PLLC
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/417 ; H01L29/78 ; H01L21/8238 ; H01L49/02 ; H01L23/492 ; H01L23/00 ; H01L23/495 ; H01L27/092 ; H01L27/088 ; H01L21/8234 ; H01L29/08 ; H01L29/41 ; H01L29/06 ; H01L29/04 ; H01L29/40
Abstract:
A semiconductor device and method are disclosed. One embodiment provides a semiconductor die with a first n-type channel FET and a second n-type channel FET. A source of the first n-type channel FET and a drain of the second n-type channel FET are electrically coupled to at least one contact area at a first side. A drain of the first n-type channel FET, a gate of the first n-type channel FET, a source of the second n-type channel FET and the gate of the second n-type channel FET are electrically coupled to contact areas at a second side. Contact areas of the first n-type channel FET and the second n-type channel FET are electrically separated from each other.
Public/Granted literature
- US20130140673A1 MONOLITHIC SEMICONDUCTOR SWITCHES AND METHOD FOR MANUFACTURING Public/Granted day:2013-06-06
Information query
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