Invention Grant
US08947125B2 Fast, low power comparator with dynamic bias background 有权
具有动态偏置背景的快速,低功耗比较器

Fast, low power comparator with dynamic bias background
Abstract:
A comparator circuit comprising an operational amplifier configured to compare a difference between a switching voltage and a reference voltage, and a dynamically adjustable bias current generator coupled to the operational amplifier. A method of conserving power in a comparator circuit includes estimating a switching regulator load current value, communicating the value to a current bias generator, enabling the bias generator with a signal from a switching regulator PFM logic circuit, and establishing a bias current at an operational amplifier of the comparator circuit on the basis of the enabling.
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