In a phase adjustment circuit, a first phase adjuster has a plurality of parallel-connected first inverters that receives an input signal to be phase-adjusted, wherein a first inverter to be activated is selected by a first control signal. A second phase adjuster has a plurality of parallel-connected second inverters that receives the input signal with a predetermined delay time, wherein a second inverter to be activated is selected by a second control signal. An output circuit receives output signals of the first and second phase adjusters and outputs a signal whose phase is adjusted within a range of the delay time. The second phase adjuster further includes transistors connected to the second inverters. During the delay time, these transistors block a current path between the first and second phase adjusters, under the control of the input signal.