An integrated circuit device can include a plurality of memory cells, each including at least one element programmable between different impedance states by application of a voltage or current; a plurality of bit line groups, each bit line group including multiple bit lines, each bit line being coupled to multiple memory cells; a plurality of current source circuits coupled to the bit line groups, each current source circuit configured to couple the bit lines of its respective group to at least a first bias node or a second bias node.