Invention Grant
US08947970B2 Word line driver circuits and methods for SRAM bit cell with reduced bit line pre-charge voltage
有权
用于SRAM位单元的字线驱动电路和方法，具有降低的位线预充电电压
- Patent Title: Word line driver circuits and methods for SRAM bit cell with reduced bit line pre-charge voltage
- Patent Title (中): 用于SRAM位单元的字线驱动电路和方法，具有降低的位线预充电电压
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Application No.: US13548846Application Date: 2012-07-13
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Publication No.: US08947970B2Publication Date: 2015-02-03
- Inventor: Perry H. Pelley , James D. Burnett
- Applicant: Perry H. Pelley , James D. Burnett
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- Main IPC: G11C11/413
- IPC: G11C11/413 ; G11C8/08 ; G11C11/418
Abstract:
A memory device comprising a plurality of static random access memory (SRAM) bit cells, and a word line driver coupled to provide a word line signal to the bit cells. The word line driver receives a global word line signal that remains active while the word line signal is asserted and subsequently de-asserted, and the word line signal is coupled between a positive supply voltage (VDD) and a supply voltage below ground (VN).
Public/Granted literature
- US20140016400A1 WORD LINE DRIVER CIRCUITS AND METHODS FOR SRAM BIT CELL WITH REDUCED BIT LINE PRE-CHARGE VOLTAGE Public/Granted day:2014-01-16
Information query
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