Invention Grant
- Patent Title: Manufacturing method of semiconductor device
- Patent Title (中): 半导体器件的制造方法
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Application No.: US13612630Application Date: 2012-09-12
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Publication No.: US08951860B2Publication Date: 2015-02-10
- Inventor: Yasushi Ishii , Hiraku Chakihara , Takahiro Maruyama , Akihiro Nakae
- Applicant: Yasushi Ishii , Hiraku Chakihara , Takahiro Maruyama , Akihiro Nakae
- Applicant Address: JP Kawaski-shi
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kawaski-shi
- Agency: Miles & Stockbridge P.C.
- Priority: JP2011-219364 20111003
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L21/28 ; H01L29/423 ; H01L29/66 ; H01L29/792 ; H01L27/115 ; H01L49/02

Abstract:
The present invention improves the production yield of a semiconductor device having nonvolatile memory cells of a split gate structure. The level difference of a lower layer resist film with which an end of a memory mat is covered is gentled, the uniformity of the thickness of a resist intermediate layer formed over the lower layer resist film is improved, and local thickness reduction or disappearance is prevented by, after forming a silicon oxide film and a silicon nitride film over each of selective gate electrodes formed in a memory cell region of a semiconductor substrate, removing the silicon oxide film and the silicon nitride film over the selective gate electrode located on the outermost side (a dummy cell region) of the memory mat in the gate length direction.
Public/Granted literature
- US20130084684A1 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE Public/Granted day:2013-04-04
Information query
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