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US08951863B2 Non-volatile memory (NVM) and logic integration 有权
非易失性存储器(NVM)和逻辑集成

Non-volatile memory (NVM) and logic integration
Abstract:
A method of forming an NVM cell and a logic transistor uses a semiconductor substrate. In an NVM region, a polysilicon select gate of the NVM cell is formed over a first thermally-grown oxygen-containing layer, and in a logic region, a work-function-setting material is formed over a high-k dielectric and a polysilicon dummy gate is formed over the work-function-setting material. Source/drains, a sidewall spacer, and silicided regions of the logic transistor are formed after the first thermally-grown oxygen-containing layer is formed. The polysilicon dummy gate is replaced by a metal gate. The logic transistor is protected while the NVM cell is then formed including forming a charge storage region.
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