Invention Grant
- Patent Title: Integrated circuit package system with post-passivation interconnection and integration
- Patent Title (中): 具有后钝化互连和集成的集成电路封装系统
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Application No.: US13456145Application Date: 2012-04-25
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Publication No.: US08951904B2Publication Date: 2015-02-10
- Inventor: Yaojian Lin , Pandi Chelvam Marimuthu
- Applicant: Yaojian Lin , Pandi Chelvam Marimuthu
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC Ltd.
- Current Assignee: STATS ChipPAC Ltd.
- Current Assignee Address: SG Singapore
- Agency: Ishimaru & Associates LLP
- Main IPC: H01L23/488
- IPC: H01L23/488 ; H01L23/525 ; H01L23/00 ; H01L23/522 ; H01L23/532
Abstract:
An integrated circuit package system including: providing an integrated circuit die, forming a first layer over the integrated circuit die, forming a bridge on and in the first layer, forming a second layer on the first layer, and forming bump pads on and in the second layer, the bump pads connected to ends of the bridge.
Public/Granted literature
- US20120205813A1 INTEGRATED CIRCUIT PACKAGE SYSTEM WITH POST-PASSIVATION INTERCONNECTION AND INTEGRATION Public/Granted day:2012-08-16
Information query
IPC分类:
