Invention Grant
US08951910B2 Methods for fabricating and forming semiconductor device structures including damascene structures
有权
用于制造和形成包括镶嵌结构的半导体器件结构的方法
- Patent Title: Methods for fabricating and forming semiconductor device structures including damascene structures
- Patent Title (中): 用于制造和形成包括镶嵌结构的半导体器件结构的方法
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Application No.: US13915210Application Date: 2013-06-11
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Publication No.: US08951910B2Publication Date: 2015-02-10
- Inventor: Howard E. Rhodes
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: TraskBritt
- Main IPC: H01L21/4763
- IPC: H01L21/4763 ; H01L21/44

Abstract:
A method and apparatus for providing a conductive structure adjacent to a damascene conductive structure in a semiconductor device structure. The semiconductor device structure includes an insulation layer with at least one damascene conductive structure formed therein, wherein the at least one damascene conductive structure includes an insulative, protective layer disposed thereon. The insulative material of the protective layer is able to resist removal by at least some suitable etchants for the insulative material of the insulation layer adjacent to the at least one damascene conductive structure. A self-aligned opening is formed by removing a portion of an insulation layer adjacent the at least one damascene conductive structure. The self-aligned opening is then filled with a conductive material to thereby provide another conductive structure adjacent to the at least one damascene conductive structure.
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