Invention Grant
- Patent Title: Chip package and fabrication method thereof
- Patent Title (中): 芯片封装及其制造方法
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Application No.: US12816301Application Date: 2010-06-15
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Publication No.: US08952519B2Publication Date: 2015-02-10
- Inventor: Chia-Sheng Lin , Po-Han Lee
- Applicant: Chia-Sheng Lin , Po-Han Lee
- Agency: Liu & Liu
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/538 ; H01L21/48 ; H01L23/00
Abstract:
A chip package and a fabrication method thereof are provided. The chip package includes a semiconductor substrate, having a first surface and an opposing second surface. A spacer is disposed under the second surface of the semiconductor substrate and a cover plate is disposed under the spacer. A recessed portion is formed adjacent to a sidewall of the semiconductor substrate, extending from the first surface of the semiconductor substrate to at least the spacer. Then, a protection layer is disposed over the first surface of the semiconductor substrate and in the recessed portion.
Public/Granted literature
- US20110169159A1 CHIP PACKAGE AND FABRICATION METHOD THEREOF Public/Granted day:2011-07-14
Information query
IPC分类:
