A pixel array of a fringe field switching (FFS) liquid crystal display panel includes a plurality of gate lines, a plurality of data line, a plurality of pixel electrodes, a plurality of common lines, and a plurality of pixel units aligned in an array configuration. The gate lines are disposed parallel to each other along a first direction. The data lines are disposed parallel to each other along a second direction. Each of the pixel units includes at least one sub-pixel region. The common lines are disposed along the first direction and electrically isolated from each other. Each of the common lines includes a plurality of common electrodes extending along the second direction. The two adjacent common electrodes of each common line are respectively disposed in the two adjacent pixel units which are located in different rows.