Invention Grant
US08954634B2 Operating a demultiplexer on an inter-integrated circuit (‘I2C’) bus
有权
在集成电路(“I2C”)总线上操作多路分解器
- Patent Title: Operating a demultiplexer on an inter-integrated circuit (‘I2C’) bus
- Patent Title (中): 在集成电路(“I2C”)总线上操作多路分解器
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Application No.: US13530245Application Date: 2012-06-22
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Publication No.: US08954634B2Publication Date: 2015-02-10
- Inventor: Michael DeCesaris , Steven C. Jacobson , Luke D. Remis , Gregory D. Sellman
- Applicant: Michael DeCesaris , Steven C. Jacobson , Luke D. Remis , Gregory D. Sellman
- Applicant Address: SG Singapore
- Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.
- Current Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.
- Current Assignee Address: SG Singapore
- Agency: Biggers Kennedy Lenart Spraggins LLP
- Agent Edward J. Lenart; Katherine S. Brown
- Main IPC: G06F3/00
- IPC: G06F3/00

Abstract:
Operating a demultiplexer on an I2C bus, the demultiplexer including a set of input signal lines from an I2C master and a plurality of sets of output signal lines, the demultiplexer configured to couple the inputs among the output in dependence upon a demultiplexer select signal line that couples the demultiplexer to a rise time detection circuit, where the rise time detection circuit is also coupled to the input signal lines and the rise time detection circuit: monitors a voltage of at least one of the input signal lines, including: receiving, from the I2C master, a signal on one of the lines; and detecting rise time of the signal; and if the rise time of the signal is less than a predefined threshold, configuring the demultiplexer to vary the coupling of the input signal lines from a first set of outputs to a second set.
Public/Granted literature
- US20130343197A1 Operating A Demultiplexer On An Inter-Integrated Circuit ('I2C') Bus Public/Granted day:2013-12-26
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