Invention Grant
- Patent Title: Split deep power down of I/O module
- Patent Title (中): 分离I / O模块的深度电源
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Application No.: US13342023Application Date: 2011-12-31
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Publication No.: US08954771B2Publication Date: 2015-02-10
- Inventor: Inder M. Sodhi , Amjad M. Khan , Zeev Offen , Ryan D. Wells
- Applicant: Inder M. Sodhi , Amjad M. Khan , Zeev Offen , Ryan D. Wells
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Main IPC: G06F1/26
- IPC: G06F1/26 ; G06F1/32

Abstract:
I/O logic can be separated into critical and non-critical portions, with the non-critical portions being powered down during processor idle. The I/O logic is separated into gate logic and ungated logic, where the ungated logic continues to be powered during a processor deep sleep state, and the gated logic is powered off during the deep sleep state. A power control unit can trigger the shutting down of the I/O logic.
Public/Granted literature
- US20130173902A1 SPLIT DEEP POWER DOWN OF I/O MODULE Public/Granted day:2013-07-04
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