Invention Grant
- Patent Title: Obsolescence tolerant flash memory architecture and physical building block (PBB) implementation
- Patent Title (中): 淘汰容错闪存架构和物理构建块(PBB)实现
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Application No.: US13163120Application Date: 2011-06-17
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Publication No.: US08954948B2Publication Date: 2015-02-10
- Inventor: Andrew Berner , Kevin Hill
- Applicant: Andrew Berner , Kevin Hill
- Applicant Address: US NY Johnson City
- Assignee: BAE Systems Controls Inc.
- Current Assignee: BAE Systems Controls Inc.
- Current Assignee Address: US NY Johnson City
- Agency: Scully, Scott, Murphy & Presser, P.C.
- Main IPC: G06F9/445
- IPC: G06F9/445 ; H01L21/00 ; H05K7/00

Abstract:
An electronic module and method for updating an electronic device wherein the electronic module is connected to a circuit board having one or more memory interfaces which may be embodied as processors in the electronic device. One or more semiconductor devices electrically communicate with an electrical circuit within the module. A programmable memory device including non-volatile memory electrically communicates with the electrical circuit of the electronic module. The programmable memory device includes a program having code saved therein. The code defines a multiplicity of functions for the electronic module for communication between the electronic module and a memory interface or processor of the electronic device. Electrical connection elements are attached to a substrate on a bottom side of the electronic module for electrically connecting the electrical circuit of the electronic module to the circuit board for communication between the programmable memory device and the memory interface or processor.
Public/Granted literature
- US20120320517A1 OBSOLESCENCE TOLERANT FLASH MEMORY ARCHITECTURE AND PHYSICAL BUILDING BLOCK (PBB) IMPLEMENTATION Public/Granted day:2012-12-20
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