Invention Grant
US08969148B2 Method for producing a transistor structure with superimposed nanowires and with a surrounding gate
有权
制造具有叠加的纳米线并具有周围栅极的晶体管结构的方法
- Patent Title: Method for producing a transistor structure with superimposed nanowires and with a surrounding gate
- Patent Title (中): 制造具有叠加的纳米线并具有周围栅极的晶体管结构的方法
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Application No.: US13862830Application Date: 2013-04-15
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Publication No.: US08969148B2Publication Date: 2015-03-03
- Inventor: Maud Vinet , Sylvain Barraud , Laurent Grenouillet
- Applicant: Commissariat a l'energie atomique et aux ene alt
- Applicant Address: FR Paris
- Assignee: Commissariat a l'energie atomique et aux energies alternatives
- Current Assignee: Commissariat a l'energie atomique et aux energies alternatives
- Current Assignee Address: FR Paris
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: FR1253490 20120416
- Main IPC: H01L29/66
- IPC: H01L29/66 ; B82Y10/00 ; B82Y40/00 ; H01L29/417 ; H01L29/775 ; H01L29/06 ; H01L29/10 ; H01L29/41
Abstract:
The present invention relates to a method for producing a microelectronic device having a channel structure formed from superimposed nanowires, in which a nanowire stack having a constant transverse section is firstly formed, followed by a sacrificial gate and insulating spacers, where source and drain areas are then formed by growth of semiconductor material on areas of the stack which are not protected by the sacrificial gate and the insulating spacers (FIG. 4D).
Public/Granted literature
- US20130302955A1 METHOD FOR PRODUCING A TRANSISTOR STRUCTURE WITH SUPERIMPOSED NANOWIRES AND WITH A SURROUNDING GATE Public/Granted day:2013-11-14
Information query
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