Invention Grant
US08969926B2 Vertical GaN JFET with low gate-drain capacitance and high gate-source capacitance 有权
具有低栅极 - 漏极电容和高栅极 - 源极电容的垂直GaN JFET

Vertical GaN JFET with low gate-drain capacitance and high gate-source capacitance
Abstract:
An embodiment of a vertical power device includes a III-nitride substrate, a drift region coupled to the III-nitride substrate and comprising a III-nitride material of a first conductivity type, and a channel region coupled to the drift region and comprising a III-nitride material of the first conductivity type. The vertical power device also includes a source region coupled to the channel region and comprising a III-nitride material of the first conductivity type, and a gate region coupled to the channel region. The gate region includes a III-nitride material of a second conductivity type. The vertical power device further includes a source-coupled region coupled to the drift region and electrically connected with the source region. The source-coupled region includes a III-nitride material of the second conductivity type.
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