Invention Grant
US08969963B2 Vertical source/drain junctions for a finFET including a plurality of fins
有权
用于包括多个翅片的finFET的垂直源极/漏极结
- Patent Title: Vertical source/drain junctions for a finFET including a plurality of fins
- Patent Title (中): 用于包括多个翅片的finFET的垂直源极/漏极结
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Application No.: US13650176Application Date: 2012-10-12
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Publication No.: US08969963B2Publication Date: 2015-03-03
- Inventor: Veeraraghavan S. Basker , Effendi Leobandung , Tenko Yamashita , Chun-chen Yeh
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Scully, Scott, Murphy & Presser, P.C.
- Agent Joseph P. Abate, Esq.
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L21/336

Abstract:
Fin-defining mask structures are formed over a semiconductor material layer. A semiconductor material portion is formed by patterning the semiconductor material layer, and a disposable gate structure is formed over the fin-defining mask structures. After formation of a disposable template layer, the disposable gate structure is removed. A plurality of semiconductor fins are formed by etching center portions of the semiconductor material portion employing the combination of the disposable template layer and the fin-defining mask structures as an etch mask. A first pad region and a second pad region laterally contact the plurality of semiconductor fins. A replacement gate structure is formed on the plurality of semiconductor fins. The disposable template layer is removed, and the first pad region and the second pad regions are vertically recessed. Vertical source/drain junctions can be formed by introducing dopants through vertical sidewalls of the recessed source and second pad regions.
Public/Granted literature
- US20140103435A1 VERTICAL SOURCE/DRAIN JUNCTIONS FOR A FINFET INCLUDING A PLURALITY OF FINS Public/Granted day:2014-04-17
Information query
IPC分类: