Invention Grant
- Patent Title: Method for creating a 3D stacked multichip module
- Patent Title (中): 创建3D堆叠多芯片模块的方法
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Application No.: US14465721Application Date: 2014-08-21
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Publication No.: US08970047B2Publication Date: 2015-03-03
- Inventor: Shih-Hung Chen
- Applicant: Macronix International Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Macronix International Co., Ltd.
- Current Assignee: Macronix International Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Haynes Beffel & Wolfeld LLP
- Agent James F. Hann
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/495 ; H01L21/00 ; H01L25/00 ; H01L21/683

Abstract:
A 3D stacked multichip module comprises a stack of W IC die. Each die has a patterned conductor layer, including an electrical contact region with electrical conductors and, in some examples, device circuitry over a substrate. The electrical conductors of the stacked die are aligned. Electrical connectors extend into the stack to contact landing pads on the electrical conductors to create a 3D stacked multichip module. The electrical connectors may pass through vertical vias in the electrical contact regions. The landing pads may be arranged in a stair stepped arrangement. The stacked multichip module may be made using a set of N etch masks with 2N-1 being less than W and 2N being greater than or equal to W, with the etch masks alternatingly covering and exposing 2n-1 landing pads for each mask n=1, 2 . . . N.
Public/Granted literature
- US20140363922A1 METHOD FOR CREATING A 3D STACKED MULTICHIP MODULE Public/Granted day:2014-12-11
Information query
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