Invention Grant
US08970049B2 Multiple chip package module having inverted package stacked over die
有权
具有堆叠在芯片上的倒置封装的多芯片封装模块
- Patent Title: Multiple chip package module having inverted package stacked over die
- Patent Title (中): 具有堆叠在芯片上的倒置封装的多芯片封装模块
-
Application No.: US11014257Application Date: 2004-12-16
-
Publication No.: US08970049B2Publication Date: 2015-03-03
- Inventor: Marcos Karnezos
- Applicant: Marcos Karnezos
- Applicant Address: US CA Fremont
- Assignee: ChipPAC, Inc.
- Current Assignee: ChipPAC, Inc.
- Current Assignee Address: US CA Fremont
- Agency: Ishimaru & Associates LLP
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L23/28 ; H01L21/70 ; H01L25/03 ; H01L23/433 ; H01L25/065 ; H01L23/00

Abstract:
A module having multiple die includes a first die on a first substrate and an inverted second package stacked over the first die, with, where necessary, provision is made for a standoff between the second package and the first die. Also, methods for making the module include steps of providing a first package having a first die attached onto an upward facing side of a first package substrate, and stacking an inverted second package over the die on the first package, provision being made where necessary for a standoff between the second package and the first package die to avoid damaging impact between the downward-facing side of the second package and wire bonds connecting the first die to the first package substrate.
Public/Granted literature
- US20050133916A1 Multiple chip package module having inverted package stacked over die Public/Granted day:2005-06-23
Information query
IPC分类: