Invention Grant
- Patent Title: Startup circuit and input capacitor balancing circuit
- Patent Title (中): 启动电路和输入电容平衡电路
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Application No.: US13347616Application Date: 2012-01-10
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Publication No.: US08971069B2Publication Date: 2015-03-03
- Inventor: Richard A. Dunipace
- Applicant: Richard A. Dunipace
- Applicant Address: US CA San Jose
- Assignee: Fairchild Semiconductor Corporation
- Current Assignee: Fairchild Semiconductor Corporation
- Current Assignee Address: US CA San Jose
- Agency: Okamoto & Benedicto LLP
- Main IPC: H02M1/36
- IPC: H02M1/36 ; H02J7/00

Abstract:
In one embodiment, an input capacitor balancing circuit for a power supply is provided. The circuit includes an input capacitance operable to filter input power for the power supply. The input capacitance has a first capacitor and a second capacitor coupled in series between an input voltage and a first node. A voltage divider circuit is coupled to the input voltage and operable to generate a divided voltage therefrom. A buffer circuit is operable to receive the divided voltage and, if the first capacitor and the second capacitor are not balanced, to provide current to the input capacitance to balance the first capacitor and the second capacitor.
Public/Granted literature
- US20120176821A1 Startup Circuit and Input Capacitor Balancing Circuit Public/Granted day:2012-07-12
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