Invention Grant
- Patent Title: Hardware managed allocation and deallocation evaluation circuit
- Patent Title (中): 硬件管理分配和释放评估电路
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Application No.: US13433901Application Date: 2012-03-29
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Publication No.: US08972693B2Publication Date: 2015-03-03
- Inventor: Laurent Lefebvre , Michael Mantor
- Applicant: Laurent Lefebvre , Michael Mantor
- Applicant Address: US CA Sunnyvale CA Markham, Ontario
- Assignee: Advanced Micro Devices, Inc.,ATI Technologies ULC
- Current Assignee: Advanced Micro Devices, Inc.,ATI Technologies ULC
- Current Assignee Address: US CA Sunnyvale CA Markham, Ontario
- Agency: Volpe and Koenig, P.C.
- Main IPC: G06F12/00
- IPC: G06F12/00

Abstract:
A system and method is provided for improving efficiency, power, and bandwidth consumption in parallel processing. Rather than using memory polling to ensure that enough space is available in memory locations for, for example, write instructions, the techniques disclosed herein provide a system and method to automate this evaluation mechanism in environments such as data-parallel processing to efficiently check available space in memory locations before instructions such as write threads are allowed. These operations are handled efficiently in hardware, but are flexible enough to be implemented in all manner of programming models.
Public/Granted literature
- US20130262812A1 Hardware Managed Allocation and Deallocation Evaluation Circuit Public/Granted day:2013-10-03
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