Invention Grant
US08972823B2 Error correcting for improving reliability by combination of storage system and flash memory device
有权
通过存储系统和闪存设备的组合来纠正提高可靠性的错误
- Patent Title: Error correcting for improving reliability by combination of storage system and flash memory device
- Patent Title (中): 通过存储系统和闪存设备的组合来纠正提高可靠性的错误
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Application No.: US14087018Application Date: 2013-11-22
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Publication No.: US08972823B2Publication Date: 2015-03-03
- Inventor: Jun Kitahara , Nagamasa Mizushima
- Applicant: Hitachi, Ltd.
- Applicant Address: JP Tokyo
- Assignee: Hitachi, Ltd.
- Current Assignee: Hitachi, Ltd.
- Current Assignee Address: JP Tokyo
- Agency: Brundidge & Stanger, P.C.
- Priority: JP2007-301556 20071121
- Main IPC: G11C29/00
- IPC: G11C29/00 ; G06F11/10 ; G11C16/34

Abstract:
According to this invention, a highly reliable memory device that uses up a life of a flash memory can be provided. The memory device is a nonvolatile memory device including a plurality of memory cells, in which: each of the plurality of memory cells is an FET which includes a floating gate; the plurality of memory cells are divided into a plurality of deletion blocks; and the nonvolatile memory device reads data stored in a first deletion block, detects and corrects an error contained in the read data, stores, when the number of bits of the detected error exceeds a threshold, the corrected data in a second deletion block, sets a smaller value as the threshold as an error frequency detected in the first deletion block is higher, and sets a smaller value as the threshold as the number of deletion times executed in the first deletion block is larger.
Public/Granted literature
- US20140082457A1 ERROR CORRECTING FOR IMPROVING RELIABILITY BY COMBINATION OF STORAGE SYSTEM AND FLASH MEMORY DEVICE Public/Granted day:2014-03-20
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