Invention Grant
US08975135B2 Analog floating-gate capacitor with improved data retention in a silicided integrated circuit
有权
模拟浮栅电容器,在硅化集成电路中具有改进的数据保留能力
- Patent Title: Analog floating-gate capacitor with improved data retention in a silicided integrated circuit
- Patent Title (中): 模拟浮栅电容器,在硅化集成电路中具有改进的数据保留能力
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Application No.: US14301766Application Date: 2014-06-11
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Publication No.: US08975135B2Publication Date: 2015-03-10
- Inventor: Kaiping Liu , Amitava Chatterjee , Imran Mahmood Khan
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Jacqueline J. Garner; Frederick J. Telecky, Jr.
- Main IPC: H01L21/8242
- IPC: H01L21/8242 ; H01L29/66 ; H01L27/06 ; H01L27/08

Abstract:
An analog floating-gate electrode in an integrated circuit, and method of fabricating the same, in which trapped charge can be stored for long durations. The analog floating-gate electrode is formed in a polycrystalline silicon gate level, and includes portions serving as a transistor gate electrode, a plate of a metal-to-poly storage capacitor, and a plate of poly-to-active tunneling capacitors. A silicide-block film comprised of a layer of silicon dioxide underlying a top layer of silicon nitride blocks the formation of silicide cladding on the electrode, while other polysilicon structures in the integrated circuit, such as polysilicon-to-metal capacitors, are silicide-clad. Following silicidation, a capacitor dielectric is deposited over the remaining polysilicon structures, followed by formation of an upper metal plate.
Public/Granted literature
- US20140295631A1 ANALOG FLOATING-GATE CAPACITOR WITH IMPROVED DATA RETENTION IN A SILICIDED INTEGRATED CIRCUIT Public/Granted day:2014-10-02
Information query
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