Invention Grant
- Patent Title: Semiconductor device manufacturing method
- Patent Title (中): 半导体器件制造方法
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Application No.: US13190052Application Date: 2011-07-25
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Publication No.: US08975150B2Publication Date: 2015-03-10
- Inventor: Kentaro Mori , Shintaro Yamamichi , Hideya Murai , Takuo Funaya , Masaya Kawano , Takehiko Maeda , Kouji Soejima
- Applicant: Kentaro Mori , Shintaro Yamamichi , Hideya Murai , Takuo Funaya , Masaya Kawano , Takehiko Maeda , Kouji Soejima
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Young & Thompson
- Priority: JP2007-153293 20070608
- Main IPC: H01L21/76
- IPC: H01L21/76 ; H01L21/683 ; H01L23/538 ; H01L23/544 ; H01L23/00

Abstract:
A transparent board is positioned on a support board provided with a positioning mark, and a release material is provided. A semiconductor element is then positioned so that the electrode element faces upward, and the support board is then removed. An insulating resin is then formed on the release material so as to cover the semiconductor element; and a via, a wiring layer, an insulation layer, an external terminal, and a solder resist are then formed. The transparent board is then peeled from the semiconductor device through the use of the release material. A chip can thereby be mounted with high precision, there is no need to provide a positioning mark during mounting of the chip on the substrate in the manufacturing process, and the substrate can easily be removed. As a result, a semiconductor device having high density and a thin profile can be manufactured at low cost.
Public/Granted literature
- US20110281401A1 SEMICONDUCTOR DEVICE MANUFACTURING METHOD Public/Granted day:2011-11-17
Information query
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