Invention Grant
US08975161B2 Dicing/die bonding integral film, dicing/die bonding integral film manufacturing method, and semiconductor chip manufacturing method
有权
切割/芯片接合一体膜，切割/芯片接合一体膜制造方法以及半导体芯片制造方法
- Patent Title: Dicing/die bonding integral film, dicing/die bonding integral film manufacturing method, and semiconductor chip manufacturing method
- Patent Title (中): 切割/芯片接合一体膜，切割/芯片接合一体膜制造方法以及半导体芯片制造方法
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Application No.: US13809816Application Date: 2011-07-13
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Publication No.: US08975161B2Publication Date: 2015-03-10
- Inventor: Rie Katou , Takayuki Matsuzaki , Shinya Katou , Ryoji Furutani , Tatsuya Sakuta , Kouji Komorida
- Applicant: Rie Katou , Takayuki Matsuzaki , Shinya Katou , Ryoji Furutani , Tatsuya Sakuta , Kouji Komorida
- Applicant Address: JP Tokyo
- Assignee: Hitachi Chemical Company, Ltd.
- Current Assignee: Hitachi Chemical Company, Ltd.
- Current Assignee Address: JP Tokyo
- Agency: Antonelli, Terry & Kraus, LLP.
- Priority: JPP2010-159030 20100713
- International Application: PCT/JP2011/065986 WO 20110713
- International Announcement: WO2012/008491 WO 20120119
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L21/683 ; H01L21/67 ; H01L21/78 ; C09J7/02
Abstract:
A dicing/die bonding integral film of the present invention includes a base film, a pressure-sensitive adhesive layer which is formed on the base film and to which a wafer ring for blade dicing is bonded, and a bonding layer formed on the adhesive layer and having a central portion to which a semiconductor wafer to be diced is bonded, wherein a planar shape of the bonding layer is circular, an area of the bonding layer is greater than an area of the semiconductor wafer and smaller than an area of each of the base film and the adhesive layer, and a diameter of the bonding layer is greater than a diameter of the semiconductor wafer and less than an inner diameter of the wafer ring, and a difference in diameter between the bonding layer and the semiconductor wafer is greater than 20 mm and less than 35 mm.
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