Invention Grant
US08975178B2 Method of manufacturing a memory device using fine patterning techniques
有权
使用精细图案化技术制造存储器件的方法
- Patent Title: Method of manufacturing a memory device using fine patterning techniques
- Patent Title (中): 使用精细图案化技术制造存储器件的方法
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Application No.: US13602841Application Date: 2012-09-04
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Publication No.: US08975178B2Publication Date: 2015-03-10
- Inventor: Keisuke Kikutani , Satoshi Nagashima , Hidefumi Mukai , Takehiro Kondoh , Hisataka Meguro
- Applicant: Keisuke Kikutani , Satoshi Nagashima , Hidefumi Mukai , Takehiro Kondoh , Hisataka Meguro
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Obon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2011-286861 20111227
- Main IPC: H01L21/4763
- IPC: H01L21/4763 ; H01L21/768 ; H01L21/033 ; H01L21/3213 ; H01L27/115

Abstract:
According to one embodiment, a method of manufacturing a device, includes forming a first core including a line portion extending between first and second regions and having a first width and a fringe having a dimension larger than the first width, forming a mask on the fringe and on a first sidewall on the first core, removing the first core so that a remaining portion having a dimension larger than the first width is formed below the mask, forming a second sidewall on a pattern corresponding the first sidewall and the remaining portion, the second sidewall having a second width less than the first width and facing a first interval less than the first width in the first region and facing a second interval larger than the first interval in the second region.
Public/Granted literature
- US20130237051A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2013-09-12
Information query
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