Invention Grant
- Patent Title: Process for forming a planar diode using one mask
- Patent Title (中): 使用一个掩模形成平面二极管的工艺
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Application No.: US13957613Application Date: 2013-08-02
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Publication No.: US08975719B2Publication Date: 2015-03-10
- Inventor: Benson Wang , Kevin Lu , Warren Chiang , Max Chen
- Applicant: Vishay General Semiconductor LLC
- Applicant Address: US NY Hauppauge
- Assignee: Vishay General Semiconductor LLC
- Current Assignee: Vishay General Semiconductor LLC
- Current Assignee Address: US NY Hauppauge
- Agency: Mayer & Williams PC
- Agent Stuart H. Mayer; Karin L. Williams
- Main IPC: H01L27/095
- IPC: H01L27/095 ; H01L29/861 ; H01L29/66 ; H01L21/22 ; H01L23/31

Abstract:
A planar diode and method of making the same employing only one mask. The diode is formed by coating a substrate with an oxide, removing a central portion of the oxide to define a window through which dopants are diffused. The substrate is given a Ni/Au plating to provide ohmic contact surfaces, and the oxide on the periphery of the window is coated with a polyimide passivating agent overlying the P/N junction.
Public/Granted literature
- US20130313684A1 PROCESS FOR FORMING A PLANAR DIODE USING ONE MASK Public/Granted day:2013-11-28
Information query
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