Invention Grant
- Patent Title: Multiplexed read-out architecture for CMOS image sensors
- Patent Title (中): CMOS图像传感器的多路读出架构
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Application No.: US13835750Application Date: 2013-03-15
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Publication No.: US08976273B2Publication Date: 2015-03-10
- Inventor: Jose Tejada-Gomez
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Robert D. Marshall, Jr.; Frederick J. Telecky, Jr.
- Main IPC: H03M3/00
- IPC: H03M3/00 ; H04N5/374 ; H04N5/357 ; H04N5/363 ; H04N5/378

Abstract:
This invention targets improvement in CMOS sensors using a multiplexed read-out architecture in which pixels are output at the pixel VN level instead of the line/reference amplifier level. The pixel signal voltage VN and offset voltage VNS are read sequentially, eliminating the differential structure. Interference rejection, usually achieved by a differential signal, is obtained by using a CDS (Correlated Double Sampler) in the same way as in the prior art.
Public/Granted literature
- US20130200253A1 MULTIPLEXED READ-OUT ARCHITECTURE FOR CMOS IMAGE SENSORS Public/Granted day:2013-08-08
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