The present invention relates to a clock-embedded or source synchronous semiconductor transmitting and receiving apparatus and to a semiconductor system including same. The semiconductor apparatus according to one embodiment of the present invention includes: a data providing unit for providing differential data; a multi-phase clock generator for generating a first clock signal provided to the data providing unit, and a second clock signal having a different phase from the first clock signal; and a combining unit for receiving the differential data and the second clock signal and combining same to generate a combined signal, wherein the second clock signal is a single clock signal and has n (here, n is an integer of two or greater) times a symbol period of the differential data, the first and second clock signals have a 90 degree phase difference, and the combination signal is transmitted to the outside through differential transmission lines.