A wireless memory device may include logic configured to detect that first data has been written by a microcontroller to a first address of a memory space of the wireless memory device; incorporate the first data into a first packet, in response to detecting that the first data has been written to the memory space, wherein the first packet includes the first address; and provide the first packet to a wireless chipset to wirelessly transmit the first packet to a destination device. The logic may be further configured to receive a second packet from the wireless chip set, wherein the second packet was received wirelessly from the destination device; retrieve a second memory address from the second packet; retrieve second data from the second packet; and write the second data to the retrieved second memory address in the memory space of the wireless memory device.