Invention Grant
US08987014B2 Semiconductor wafer and method of forming sacrificial bump pad for wafer probing during wafer sort test
有权
半导体晶片和晶片分选测试期间用于晶圆探测的牺牲凸块的形成方法
- Patent Title: Semiconductor wafer and method of forming sacrificial bump pad for wafer probing during wafer sort test
- Patent Title (中): 半导体晶片和晶片分选测试期间用于晶圆探测的牺牲凸块的形成方法
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Application No.: US12467094Application Date: 2009-05-15
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Publication No.: US08987014B2Publication Date: 2015-03-24
- Inventor: Rajendra D. Pendse
- Applicant: Rajendra D. Pendse
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC, Ltd.
- Current Assignee: STATS ChipPAC, Ltd.
- Current Assignee Address: SG Singapore
- Agency: Patent Law Group: Atkins and Associates, P.C.
- Agent Robert D. Atkins
- Main IPC: H01L21/66
- IPC: H01L21/66 ; H01L23/31

Abstract:
A semiconductor wafer contains a plurality of semiconductor die. A plurality of interconnect bump pads is formed over the semiconductor die. A plurality of sacrificial bump pads is formed in proximity to and diagonally offset with respect to the interconnect bump pads. The sacrificial bump pads have a different diameter than the interconnect bump pads. A conductive link is formed between each interconnect bump pad and proximate sacrificial bump pad. The sacrificial bump pads, interconnect bump pads, and conductive link are formed concurrently or during bump formation. The wafer is electrically tested by contacting the sacrificial bump pads. The electrical test identifies known good die and defective die. The sacrificial bump pads and a portion of the conductive link are removed after wafer probing. Bumps are formed over the interconnect bump pads. The semiconductor wafer can be sold or transferred to a third party after wafer probing without bumps.
Public/Granted literature
- US20090289253A1 Semiconductor Wafer and Method of Forming Sacrificial Bump Pad for Wafer Probing During Wafer Sort Test Public/Granted day:2009-11-26
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