Invention Grant
- Patent Title: Method of manufacturing nonvolatile semiconductor memory device
- Patent Title (中): 制造非易失性半导体存储器件的方法
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Application No.: US14043134Application Date: 2013-10-01
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Publication No.: US08987088B2Publication Date: 2015-03-24
- Inventor: Kiwamu Sakuma
- Applicant: Kabushiki Kaisha Toshiba
- Applicant Address: JP Minato-ku
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2013-053682 20130315
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L29/66 ; H01L21/28 ; H01L27/115 ; H01L29/788 ; H01L29/792

Abstract:
According to one embodiment, a method includes forming a gate insulating layer structure covering first and second stacked layer structures, forming a first conductive layer on the gate insulating layer structure, forming a sacrifice layer on the first conductive layer, patterning the first conductive layer and the sacrifice layer with a line & space pattern, filling an insulating layer in spaces of the line & space pattern, the insulating layer having an etching characteristic different from the sacrifice layer, forming trenches in lines of the line & space pattern by removing the sacrifice layer selectively, the trenches exposing the first conductive layer between the first and second stacked layer structures, and forming a second conductive layer on the first conductive layer in the trenches.
Public/Granted literature
- US20140273372A1 METHOD OF MANUFACTURING NONVOLATILE SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2014-09-18
Information query
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