Invention Grant
US08990448B2 Smart discovery model in a serial attached small computer system topology 有权
智能发现模型在串行连接的小型计算机系统拓扑中

Smart discovery model in a serial attached small computer system topology
Abstract:
Methods, systems and processor-readable media are disclosed for implementing a “smart” discovery process in a data transfer regime having one or more expanders and one or more initiators. Data traffic associated with such a discovery process can be reduced and one or more of the initiators can be prevented from blocking input/output to particular components in communication with the data transfer regime, thereby improving and completing the discovery process in an optimal time frame while enhancing the performance of the initiator(s).
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