Invention Grant
US08990448B2 Smart discovery model in a serial attached small computer system topology
有权
智能发现模型在串行连接的小型计算机系统拓扑中
- Patent Title: Smart discovery model in a serial attached small computer system topology
- Patent Title (中): 智能发现模型在串行连接的小型计算机系统拓扑中
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Application No.: US13790488Application Date: 2013-03-08
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Publication No.: US08990448B2Publication Date: 2015-03-24
- Inventor: Prashant Prakash Yendigiri , Raghavendra Channagiri Nagendra , Giridhar Danayakanakeri
- Applicant: LSI Corporation
- Applicant Address: US CA Milpitas
- Assignee: LSI Corporation
- Current Assignee: LSI Corporation
- Current Assignee Address: US CA Milpitas
- Agency: Duft Bornsen & Fettig
- Main IPC: G06F3/00
- IPC: G06F3/00 ; G06F5/00 ; G06F11/30

Abstract:
Methods, systems and processor-readable media are disclosed for implementing a “smart” discovery process in a data transfer regime having one or more expanders and one or more initiators. Data traffic associated with such a discovery process can be reduced and one or more of the initiators can be prevented from blocking input/output to particular components in communication with the data transfer regime, thereby improving and completing the discovery process in an optimal time frame while enhancing the performance of the initiator(s).
Public/Granted literature
- US20140258565A1 SMART DISCOVERY MODEL IN A SERIAL ATTACHED SMALL COMPUTER SYSTEM TOPOLOGY Public/Granted day:2014-09-11
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