Invention Grant
- Patent Title: Selective masking for error correction
- Patent Title (中): 选择性掩蔽纠错
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Application No.: US13159878Application Date: 2011-06-14
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Publication No.: US08990657B2Publication Date: 2015-03-24
- Inventor: William C. Moyer
- Applicant: William C. Moyer
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- Main IPC: G11C29/00
- IPC: G11C29/00 ; G06F11/10 ; H03M13/13

Abstract:
Error correction code (ECC) checkbits are generated for each write access to a memory address based on both the data to be written (the write data) and the memory address. The data processing device employs multiple-mapped or multi-port memory, whereby different memory addresses can be associated with the same memory location. To generate the ECC checkbits the data processing device selects a mask for each write access based on the write address and determines the ECC checkbits based on the write data, the write address, and the mask.
Public/Granted literature
- US20120324312A1 SELECTIVE MASKING FOR ERROR CORRECTION Public/Granted day:2012-12-20
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