Invention Grant
- Patent Title: Error check and correction circuit, method, and memory device
- Patent Title (中): 错误检查和纠正电路,方法和存储器件
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Application No.: US13958074Application Date: 2013-08-02
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Publication No.: US08990667B2Publication Date: 2015-03-24
- Inventor: Masao Kuriyama
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Suwon-si, Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si, Gyeonggi-do
- Agency: Volentine & Whitt, PLLC
- Priority: JP2012-173182 20120803; KR10-2013-0039901 20130411
- Main IPC: H03M13/00
- IPC: H03M13/00 ; H03M13/11 ; H03M13/15

Abstract:
An error check and correction method employs a circuit which includes a data storage unit configured to store a data string; a syndrome calculation unit configured to calculate a syndrome from the data string; an error coefficient calculation unit configured to calculate coefficients of an error location search equation using the syndrome; a latch unit configured to store the coefficients; a substitution value calculation unit configured to calculate a substitution value using the coefficients stored in the latch unit and an address; a Chien search unit configured to output an error detection signal indicating for each bit of the data string whether an error exists, in response to a result obtained by substituting the substitution value in the error location search equation; and an error correction unit configured to correct the error in response to the error detection signal indicating that the error exists.
Public/Granted literature
- US20140040699A1 ERROR CHECK AND CORRECTION CIRCUIT, METHOD, AND MEMORY DEVICE Public/Granted day:2014-02-06
Information query
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