Invention Grant
US08995175B1 Memory circuit with PMOS access transistors 有权
具有PMOS存取晶体管的存储电路

Memory circuit with PMOS access transistors
Abstract:
A memory circuit that includes a memory storage unit and access transistors coupled to the memory storage unit, where the access transistors include PMOS transistors, is described. In one implementation, the memory circuit further includes a bias clamp transistor coupled to the memory storage unit.
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