Invention Grant
- Patent Title: Defect scan and manufacture test
- Patent Title (中): 缺陷扫描和制造测试
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Application No.: US14054662Application Date: 2013-10-15
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Publication No.: US08996954B2Publication Date: 2015-03-31
- Inventor: Yu Kou , Lingqi Zeng
- Applicant: SK hynix memory solutions inc.
- Applicant Address: US CA San Jose
- Assignee: SK hynix memory solutions inc.
- Current Assignee: SK hynix memory solutions inc.
- Current Assignee Address: US CA San Jose
- Agency: Van Pelt, Yi & James LLP
- Main IPC: G11C29/00
- IPC: G11C29/00 ; G11C29/42 ; G11C29/32 ; G11C29/44 ; G06F11/07 ; H03M13/11

Abstract:
A method for detecting a defect in a portion of a storage device is disclosed. Reference data and data read from the portion are compared to determine a number of error bits and a number of error symbols. An error ratio is computed, wherein the error ratio comprises a ratio of the number of error bits to the number of error symbols. A defect is detected based on whether the error ratio exceeds a threshold. In some embodiments, the reference data and the read data are compared to determine an error vector, wherein a bit in the error vector with a value one indicates a bit error in the read data. For each of a plurality of windows of the error vector, a corresponding number of error bits is determined. A defect is detected based on whether any of the numbers of error bits exceeds a threshold.
Public/Granted literature
- US20140143616A1 DEFECT SCAN AND MANUFACTURE TEST Public/Granted day:2014-05-22
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