Invention Grant
- Patent Title: Silicon wafer and method for heat-treating silicon wafer
- Patent Title (中): 硅晶片和硅晶片热处理方法
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Application No.: US13322080Application Date: 2010-05-28
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Publication No.: US08999864B2Publication Date: 2015-04-07
- Inventor: Takeshi Senda , Hiromichi Isogai , Eiji Toyoda , Koji Araki , Tatsuhiko Aoki , Haruo Sudo , Koji Izunome , Susumu Maeda , Kazuhiko Kashima , Hiroyuki Saito
- Applicant: Takeshi Senda , Hiromichi Isogai , Eiji Toyoda , Koji Araki , Tatsuhiko Aoki , Haruo Sudo , Koji Izunome , Susumu Maeda , Kazuhiko Kashima , Hiroyuki Saito
- Applicant Address: JP Niigata
- Assignee: Global Wafers Japan Co., Ltd.
- Current Assignee: Global Wafers Japan Co., Ltd.
- Current Assignee Address: JP Niigata
- Agency: Buchanan, Ingersoll & Rooney PC
- Priority: JP2009-134252 20090603; JP2009-153776 20090629; JP2009-179319 20090731
- International Application: PCT/JP2010/003583 WO 20100528
- International Announcement: WO2010/140323 WO 20101209
- Main IPC: H01L21/26
- IPC: H01L21/26 ; H01L21/00 ; H01L21/322

Abstract:
A silicon wafer for preventing a void defect in a bulk region from becoming source of contamination and slip generation in a device process is provided. And a heat-treating method thereof for reducing crystal defects such as COP in a region near the wafer surface to be a device active region is provided. The silicon wafer has a surface region 1 which is a defect-free region and a bulk region 2 including void defect of a polyhedron whose basic shape is an octahedron in which a corner portion of the polyhedron is in the curved shape and an inner-wall oxide film the void defect is removed. The silicon wafer is provided by performing a heat-treating method in which gas to be supplied, inner pressure of spaces and a maximum achievable temperature are set to a predetermined value when subjecting the silicon wafer produced by a CZ method to RTP.
Public/Granted literature
- US20120139088A1 SILICON WAFER AND METHOD FOR HEAT-TREATING SILICON WAFER Public/Granted day:2012-06-07
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