Invention Grant
US09000558B2 Wafer-level flip chip package with RF passive element/ package signal connection overlay
有权
晶圆级倒装芯片封装,带RF无源元件/封装信号连接覆盖层
- Patent Title: Wafer-level flip chip package with RF passive element/ package signal connection overlay
- Patent Title (中): 晶圆级倒装芯片封装,带RF无源元件/封装信号连接覆盖层
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Application No.: US12534640Application Date: 2009-08-03
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Publication No.: US09000558B2Publication Date: 2015-04-07
- Inventor: Ali Sarfaraz , Arya Reza Behzad
- Applicant: Ali Sarfaraz , Arya Reza Behzad
- Applicant Address: US CA Irvine
- Assignee: Broadcom Corporation
- Current Assignee: Broadcom Corporation
- Current Assignee Address: US CA Irvine
- Agency: Garlick & Markison
- Agent Edward J. Marshall
- Main IPC: H01L23/485
- IPC: H01L23/485 ; H01L23/522 ; H01L23/31

Abstract:
A packaged integrated circuit includes an integrated circuit having a Radio Frequency (RF) passive element formed therein and a wafer level chip scale flip chip package that contains the integrated circuit. The wafer level chip scale flip chip package includes at least one dielectric layer isolating a top metal layer of the integrated circuit and a package signal connection upon the at least one dielectric layer, wherein the package signal connection partially overlays the RF passive element with respect to a surface of the integrated circuit. The RF passive element may be an inductor, a transformer, a capacitor, or another passive element. The package signal connection may be a conductive ball, a conductive bump, a conductive pad, or a conductive spring, for example. A conductive structure may reside upon the at least one dielectric layer to provide shielding to the RF passive element and may include a plurality of conductive elements or a mesh.
Public/Granted literature
- US20100181642A1 WAFER-LEVEL FLIP CHIP PACKAGE WITH RF PASSIVE ELEMENT/ PACKAGE SIGNAL CONNECTION OVERLAY Public/Granted day:2010-07-22
Information query
IPC分类: