Invention Grant
US09000560B2 Anti-fuse array of semiconductor device and method for forming the same 有权
半导体器件的抗熔丝阵列及其形成方法

  • Patent Title: Anti-fuse array of semiconductor device and method for forming the same
  • Patent Title (中): 半导体器件的抗熔丝阵列及其形成方法
  • Application No.: US13843282
    Application Date: 2013-03-15
  • Publication No.: US09000560B2
    Publication Date: 2015-04-07
  • Inventor: Min Chul Sung
  • Applicant: SK Hynix Inc.
  • Applicant Address: KR Icheon
  • Assignee: SK Hynix Inc.
  • Current Assignee: SK Hynix Inc.
  • Current Assignee Address: KR Icheon
  • Priority: KR10-2012-0156320 20121228
  • Main IPC: H01L23/52
  • IPC: H01L23/52 H01L23/525 H01L21/66 H01L27/112
Anti-fuse array of semiconductor device and method for forming the same
Abstract:
An anti-fuse array of a semiconductor device and a method for forming the same are disclosed. The anti-fuse array for a semiconductor device includes a first-type semiconductor substrate formed to define an active region by a device isolation region, a second-type impurity implantation region formed in the active region, a first-type channel region isolated from the semiconductor substrate by the second-type impurity implantation region, a gate electrode formed over the channel region, and a first metal contact formed over the second-type impurity implantation region.
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