Invention Grant
- Patent Title: Method of test probe alignment control
- Patent Title (中): 测试探针对准控制方法
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Application No.: US13495421Application Date: 2012-06-13
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Publication No.: US09000798B2Publication Date: 2015-04-07
- Inventor: Jui-Long Chen , Chien-Chih Liao , Tseng Chin Lo , Hui-Yun Chao , Ta-Yung Lee , Jong-I Mou , Chin-Hsiang Lin
- Applicant: Jui-Long Chen , Chien-Chih Liao , Tseng Chin Lo , Hui-Yun Chao , Ta-Yung Lee , Jong-I Mou , Chin-Hsiang Lin
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes & Boone, LLP
- Main IPC: G01R31/02
- IPC: G01R31/02 ; G01R31/28 ; H01L23/544

Abstract:
A system and method for aligning a probe, such as a wafer-level test probe, with wafer contacts is disclosed. An exemplary method includes receiving a wafer containing a plurality of alignment contacts and a probe card containing a plurality of probe points at a wafer test system. A historical offset correction is received. Based on the historical offset correct, an orientation value for the probe card relative to the wafer is determined. The probe card is aligned to the wafer using the orientation value in an attempt to bring a first probe point into contact with a first alignment contact. The connectivity of the first probe point and the first alignment contact is evaluated. An electrical test of the wafer is performed utilizing the aligned probe card, and the historical offset correction is updated based on the orientation value.
Public/Granted literature
- US20130335109A1 METHOD OF TEST PROBE ALIGNMENT CONTROL Public/Granted day:2013-12-19
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