Invention Grant
- Patent Title: Method and apparatus for protecting transistors
- Patent Title (中): 用于保护晶体管的方法和装置
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Application No.: US13264449Application Date: 2010-04-19
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Publication No.: US09000830B2Publication Date: 2015-04-07
- Inventor: Jügen Pirchenfellner , Günter Achleitner , Stephan Holzinger , Walter Pammer
- Applicant: Jügen Pirchenfellner , Günter Achleitner , Stephan Holzinger , Walter Pammer
- Applicant Address: AT Pettenbach
- Assignee: FRONIUS International GmbH
- Current Assignee: FRONIUS International GmbH
- Current Assignee Address: AT Pettenbach
- Agency: Collard & Roe, P.C.
- Priority: ATA706/2009 20090508
- International Application: PCT/AT2010/000118 WO 20100419
- International Announcement: WO2010/127374 WO 20101111
- Main IPC: H03K17/56
- IPC: H03K17/56 ; H03K17/16 ; H02M1/38 ; H03K17/687 ; H03K17/567 ; H03K19/003

Abstract:
The invention relates to a method and to an apparatus for protecting transistors (S1, S3; S2, S4) arranged in at least one path, wherein transistors (S1, S3; S2, S4) connected in series to which an input voltage (Ue) is applied are arranged in a path (2), and the transistors (S1, S3; S2, S4) of a path are alternately switched between a conductive state and a blocking state in order to generate an output voltage (Ua) at the center of the path. In order to prevent both transistors (S1, S3; S2, S4) of a path from triggering, the blocking state of the second transistor (S3; S4) of the path is checked before switching a transistor (S1; S2) into the conductive state, and the switching is released by way of a signal generated during the check.
Public/Granted literature
- US20120032729A1 METHOD AND APPARATUS FOR PROTECTING TRANSISTORS Public/Granted day:2012-02-09
Information query
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