Invention Grant
- Patent Title: Analog-to-digital converter with clock halting circuit
- Patent Title (中): 具有时钟停止电路的模数转换器
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Application No.: US14108294Application Date: 2013-12-16
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Publication No.: US09000968B1Publication Date: 2015-04-07
- Inventor: Sunny Gupta , Kumar Abhishek , Nitin Pant
- Applicant: Sunny Gupta , Kumar Abhishek , Nitin Pant
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc
- Current Assignee: Freescale Semiconductor, Inc
- Current Assignee Address: US TX Austin
- Agent Charles Bergere
- Main IPC: H03M1/12
- IPC: H03M1/12 ; H03M1/08 ; H03M1/00
Abstract:
An analog to digital converter (ADC) includes a clock-halting circuit that is enabled by an externally generated trigger signal. The clock-halting circuit halts an input clock signal to the ADC for a predetermined time period and resumes the input clock signal to the ADC when the predetermined time period ends.
Information query
